Port Control registers. More...

Public Attributes
dd	command_list_base_l

dd	command_list_base_h

dd	fis_base_l

dd	fis_base_h

dd	interrupt_status

dd	interrupt_enable

dd	command

dd	reserved0

dd	task_file_data

dd	signature

dd	sata_status

dd	sata_control

dd	sata_error

dd	sata_active

dd	command_issue

dd	sata_notification

dd	fis_based_switch_control

rd	reserved1

rd	vendor

Detailed Description

Port Control registers.

Source: blkdev/ahci.inc:105

Member Data Documentation

◆ command

dd HBA_PORT::command

0x18, command and status

◆ command_issue

dd HBA_PORT::command_issue

0x38

◆ command_list_base_h

dd HBA_PORT::command_list_base_h

0x04, command list base address upper 32 bits, used on 64 bit systems

◆ command_list_base_l

dd HBA_PORT::command_list_base_l

0x00, command list base address, 1K-byte aligned

◆ fis_base_h

dd HBA_PORT::fis_base_h

0x0C, FIS base address upper 32 bits, used on 64 bit systems

◆ fis_base_l

dd HBA_PORT::fis_base_l

0x08, FIS base address, 256-byte aligned

◆ fis_based_switch_control

dd HBA_PORT::fis_based_switch_control

0x40

◆ interrupt_enable

dd HBA_PORT::interrupt_enable

0x14

◆ interrupt_status

dd HBA_PORT::interrupt_status

0x10

◆ reserved0

dd HBA_PORT::reserved0

0x1C

◆ reserved1

rd HBA_PORT::reserved1

0x44 - 0x6F

◆ sata_active

dd HBA_PORT::sata_active

0x34, SATA active (SCR3:SActive)

◆ sata_control

dd HBA_PORT::sata_control

0x2C, SATA control (SCR2:SControl)

◆ sata_error

dd HBA_PORT::sata_error

0x30, SATA error (SCR1:SError)

◆ sata_notification

dd HBA_PORT::sata_notification

0x3C, SATA notification (SCR4:SNotification)

◆ sata_status

dd HBA_PORT::sata_status

0x28, SATA status (SCR0:SStatus)

◆ signature

dd HBA_PORT::signature

0x24

◆ task_file_data

dd HBA_PORT::task_file_data

0x20

◆ vendor

rd HBA_PORT::vendor

0x70 - 0x7F, vendor specific

The documentation for this struct was generated from the following file:

blkdev/ahci.inc

Public Attributes